Handling interrupts windows

CPU is a busy taskmaster. Any subsystem requiring the attention of the CPU generates Interrupt. Generally, the memory subsystem does not generate Interrupt. The Interruption alters the CPU execution flow. Recognising and servicing Interrupts is fundamental to any processor design.

Interrupts categorization and details are detailed in figure Any remedial action to be taken is also part of the ISR. For example, if an interrupt is caused for informing an error in the device, the same needs to be informed to the user and any possible retry to be done for recovery from the error.

Essentially, an Interrupt alters the flow of the program execution. Context switching helps the CPU to switch processes or tasks and is an essential feature supported by the Operating System. By now you would have guessed the increasing complexity of information regarding Interrupt handling especially the puzzle about the CPU getting ISR location address. The ISR location depends on the source of Interrupt.

This information is provided in the form of type code, or a vector, or an address where the vector can be found. Generally, the type codes are translated into a vector by the processor. Interrupt vectors are either the address of the ISR or pointer in a vector table where the relevant ISR address is found.

Although the vector table composition is implementation-specific, an example of a vector table is shown below. To put simply, as shown in figure From figure Skip to main content.

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Table of Contents. Improve Article. Save Article. Like Article. Interrupt is a signal emitted by hardware or software when a process or an event needs immediate attention. It alerts the processor to a high-priority process requiring interruption of the current working process. Before loading the Program Counter with the address, the address of the interrupted instruction is moved to a temporary location.

While the processor is handling the interrupts, it must inform the device that its request has been recognized so that it stops sending the interrupt request signal. Also, saving the registers so that the interrupted process can be restored in the future, increases the delay between the time an interrupt is received and the start of the execution of the ISR. This is called Interrupt Latency. Hardware Interrupts: In a hardware interrupt, all the devices are connected to the Interrupt Request Line.

A single request line is used for all the n devices. To request an interrupt, a device closes its associated switch. The processor interrupts the program currently being executed. The device is informed that its request has been recognized and the device deactivates the request signal.